Friday, December 4, 2009

News:Grid computing tunes tiny transistors for future chips

A vast network of computers is being harnessed to design components for the next generation of silicon chips.

Simulations of transistors smaller than 30 nanometres (billionths of a metre) are being run on the UK e-science grid, which links thousands of computers.

The results will help designers cope with the physical constraints that occur when working at such tiny scales.

About 20 years worth of processing time has been used by simulating hundreds of thousands of tiny transistors.


More here:Future chips

No comments:

Post a Comment